Tutorial Schedule
Saturday, June 24 | ||
---|---|---|
Time | Tutorial Name | Location |
9:00-17:30 | Hardware Architectures for Deep Neural Networks | Sheraton Hall E |
9:00-17:30 | Solving and Sharing the Puzzle: Modeling and Simulation of Computer Architectures with SST and OCCAM | Davenport |
9:00-17:30 | Intel Hardware Accelerator Research Program – A Tutorial for learning and using the Intel Xeon with integrated FPGA | Sheraton Hall C |
Tutorial on Hardware Architectures for Deep Neural Networks
[Full Day: Saturday, June 24, 2017]
Link: http://eyeriss.mit.edu/tutorial.html
Organizers: Joel Emer (MIT/NVIDIA), Vivienne Sze (MIT), Yu-Hsin Chen (MIT)
Solving and Sharing the Puzzle: Modeling and Simulation of Computer Architectures with SST and OCCAM
[Full Day: Saturday, June 24, 2017]
Link: https://occam.cs.pitt.edu/portal/isca17
Organizers: Bruce Childers (University of Pittsburgh), Luís Oliveira (University of Pittsburgh), Arun Rodrigues (Sandia National Labs (SNL)), Branden Moore (Sandia National Labs (SNL)), Richard Murphy (Micron Technology, Inc., Boise State University), Noel Wheeler (Laboratory for Physical Sciences), Marcel Fallet (Laboratory for Physical Sciences)
Intel Hardware Accelerator Research Program – A Tutorial for learning and using the Intel Xeon with integrated FPGA
[Full Day: Saturday, June 24, 2017]
Link: Intel Harp Tutorial
Organizers: Elizabeth Barnes, PMP, Data Center Group FPGA Partner Manager, Debbie Marr, Sr. Principal Engineer and Director of Accelerator Architecture Lab,
Enno Luebbers, David Sheffield, Michael Adler, Eriko Nurvitadhi, Andrey Ayupov, Jack Yinger (Intel)
Sunday, June 25 | ||
---|---|---|
Time | Tutorial Name | Location |
9:00-12:30 | dist-gem5: Modeling and Simulating a Distributed Computer System Using Multiple Simulation Hosts | Danforth |
13:30-17:30 | Accelerating Big Data Processing with Hadoop, Spark and Memcached on Datacenters with Modern Architectures | Davenport |
13:30-17:30 | Why Memory Consistency Models Matter… And tools for analyzing and verifying them | Sheraton Hall C |
**CANCELLED** The 2nd Memory Reliability Forum
[Half Day: Sunday, June 25, 2017 (in the morning)]
Organizers: Prashant J. Nair (Georgia Tech)
dist-gem5: Modeling and Simulating a Distributed Computer System Using Multiple Simulation Hosts
[Half Day: Sunday, June 25, 2017 (in the morning)]
Link: http://gem5.org/Tutorial_on_dist-gem5_at_ISCA_2017
Organizers: Nam Sung Kim (UIUC)
Accelerating Big Data Processing with Hadoop, Spark and Memcached on Datacenters with Modern Architectures
[Half Day: Sunday, June 25, 2017 (in the afternoon)]
Link: http://web.cse.ohio-state.edu/~panda/isca17_bigdata_tut.html
Organizers: Dhabaleswar K. (DK) Panda and Xiaoyi Lu (The Ohio State University)
Why Memory Consistency Models Matter... And tools for analyzing and verifying them
[Half Day: Sunday, June 25, 2017 (in the afternoon)]
Link: http://check.cs.princeton.edu/tutorial.html
Organizers: Margaret Martonosi (Princeton)