Abstract of Tutorial: This full day tutorial will provide an overview and how to program the Intel® Xeon® with Integrated FPGA. This reconfigurable hardware has an integrated host processor with memory coherency between the Intel® Xeon® processor and the FPGA providing a heterogeneous compute solution for workload optimizations. It is proving greater performance and efficiencies across many data center type workloads such as cloud services, analytics, genomics, security, packet processing, virtual switching, compression, deduplication and many more. With a simplified programming model (support for virtual addressing and data caching) the Intel Xeon with integrated FPGA enables new classes of algorithms for acceleration. The tutorial will also highlight Intel’s Hardware Acceleration Research Program which provides faculty and researchers access to pre-production Intel® Xeon® with integrated FPGA systems and is spurring research in programming tools, operating systems, and innovative applications for accelerator-based computing systems. During the session the hardware and software architecture over will be explained as well as how it can be programmed using RTL and OpenCL. A multi-hour hands-on lab session will be held to allow attendees to get first-hand experience on this exciting new technology.
List of Topics to be Covered (including format (e.g. talks, demos, etc), target audience, and pre-requisite knowledge:
Pre-Requisite – Basic knowledge of computer logic design and FPGA fundamentals
Expected Duration: Full Day
Detailed Schedule:
| Time | Who | What |
|---|---|---|
| 8:30-9:00 | Breakfast | |
| 9:00-9:15 | Elizabeth | Welcome |
| 9:15-9:45 | Enno | Roadmap, HW Overview |
| 9:45-11:45 | Michael & David | CCI & AFU |
| 11:45-12:30 | Enno | SW Overview |
| 12:30-1:30 | Lunch | |
| 1:30 - 2:15 | Andrey | System C |
| 2:15-3:00 | Andrei Hagiescu | OpenCL |
| 3:00-3:30 | Break | |
| 3:30-5:30 | All | Hands-on Lab |
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